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en:uhsdr_dev:segger_j_link [24.02.2018 14:22] – df9ts_user | en:uhsdr_dev:segger_j_link [27.02.2018 07:38] – df9ts_user |
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Segger Tools require a Segger probe to be used. For non-commercial use Segger offers the low priced "J-Link Edu" probe | ==== Segger J-Link Introduction ==== |
| Segger provides a probe - J-Link - that can be used for programming and debugging. For non-commercial use Segger offers the low priced [[https://www.segger.com/products/debug-probes/j-link/models/j-link-edu/|J-Link Edu]] probe. |
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Segger supports the Cortex M7 SWV interface used on OVI40 UI and offers plug-ins for MCU eclipse. | Segger supports the Cortex M7 SWV interface used on OVI40 UI and offers plug-ins for MCU eclipse. |
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For Debug output Segger offers two options in MCU eclipse: | For Debug output Segger offers an two options in MCU eclipse: |
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* TRACESWO output as defined by CORTEX M7. This requires a dedicated pin, currently used for M3 pushbutton switch | * TRACESWO output as defined by CORTEX M7. This requires a dedicated pin, currently used for M3 pushbutton switch |
* Segger Real Time Tracing (RTT) with outputs debug messages in high speed via SWV debug lines (CLK and SWData). No need for an additional line to printout debug messages | * [[https://www.segger.com/products/debug-probes/j-link/technology/real-time-transfer/about-real-time-transfer/|Segger Real Time Tracing (RTT)]] with outputs debug messages in high speed via SWV debug lines (CLK and SWData). No need for an additional line to printout debug messages (as is the case with TRACESWO). |
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| The J-Link makes use of the Cortex-M feature, which allows accessing the memory via the debug interface while the target is running. |
| How this works in general is described [[https://www.segger.com/jlink-rtt.html|here]]. |
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The speed advantage of RTT - according to Segger data - is impressive: | The speed advantage of RTT - according to Segger data - is impressive: |
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==== Install J-Link Software ==== | ==== Install J-Link Software ==== |
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=== Debian SW Install === | === Debian SW Install === |
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* Download .deb J-Link packages from [[http://www.segger.com/download_jlink.html|http://www.segger.com/download_jlink.html]] | * Download .deb J-Link packages from [[http://www.segger.com/download_jlink.html|http://www.segger.com/download_jlink.html]] |
* Download J-link .deb file, open terminal and go to download folder with terminal<code>$ sudo dpkg -i nameofdebpackage.deb</code> | * Download J-link .deb file, open terminal and go to download folder with terminal |
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| <code> |
| $ sudo dpkg -i nameofdebpackage.deb |
| </code> |
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=== Windows SW Install === | === Windows SW Install === |
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ToDo | ToDo |
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==== Segger J-Link adapter Firmware update ==== | ==== Segger J-Link adapter Firmware update ==== |
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As part of the Segger J-Link SW pack the "J-Link Configurator" utility. In Windows it can be started using the Windows start menu | As part of the Segger J-Link SW pack the "J-Link Configurator" utility. In Windows it can be started using the Windows start menu |
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=== Install Packs === | === Install Packs === |
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For installing CMSIS packs see [[https://gnu-mcu-eclipse.github.io/plugins/packs-manager/|here]] | For installing CMSIS packs see [[https://gnu-mcu-eclipse.github.io/plugins/packs-manager/|here]] |
* Install the GNU MCU Eclipse Packs | |
* Download CMSIS packs from Keil, see | * Install the GNU MCU Eclipse Packs |
| * Download CMSIS packs from Keil, see |
* Install local cop of STM32F7 and STM32H7 | * Install local cop of STM32F7 and STM32H7 |
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=== J-Link and Eclipse === | === J-Link and Eclipse === |
* Describe Eclipse seetings (MCU, CMSIS, probe settings, ...) to use J-link probe on Eclipse with uHSDR | |
| * Describe Eclipse seetings (MCU, CMSIS, probe settings, …) to use J-link probe on Eclipse with uHSDR |
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==== Segger Real Time Terminal RTT ==== | ==== Segger Real Time Terminal RTT ==== |
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* See [[https://wiki.segger.com/RTT|here]] | * See [[https://wiki.segger.com/RTT|here]] |
* See {{ :en:uhsdr_dev:an08005_usingrttoncortexar.pdf |AN08005}} (although this is for Cortex-A / Cortex-R and not the Cortex-M used by OVI40 it still gives some insights) | * See {{:en:uhsdr_dev:an08005_usingrttoncortexar.pdf|AN08005}} (although this is for Cortex-A / Cortex-R and not the Cortex-M used by OVI40 it still gives some insights) |
* [[https://os.mbed.com/teams/anyThing-Connected/code/SEGGER_RTT/|Try RTT on UHSDR]] - is it really 100 times faster than SWO print and 10.000 times fasster than semi-hosting? Segger says [[https://wiki.segger.com/RTT|here]] that Cortex-M supports background memory access and that RTT will have no impact on Cortex-M execution speed | * [[https://os.mbed.com/teams/anyThing-Connected/code/SEGGER_RTT/|Try RTT on UHSDR]] |
| - is it really 100 times faster than SWO print and 10.000 times fasster than semi-hosting? Segger says [[https://wiki.segger.com/RTT|here]] that Cortex-M supports background memory access and that RTT will have no impact on Cortex-M execution speed |
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== RTT target code == | == RTT target code == |
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The RTT target code is shipped as part of the J-Link Software and Documentation Pack which can be downloaded [[https://www.segger.com/products/debug-probes/j-link/technology/real-time-transfer/about-real-time-transfer/|here]]. The RTT sources can be found in the J-Link software package under: Samples/RTT | The RTT target code is shipped as part of the J-Link Software and Documentation Pack which can be downloaded [[https://www.segger.com/products/debug-probes/j-link/technology/real-time-transfer/about-real-time-transfer/|here]]. The RTT sources can be found in the J-Link software package under: Samples/RTT |
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==== J-Link support for Option bytes and Lock / Unlock ==== | ==== J-Link support for Option bytes and Lock / Unlock ==== |
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Segger provides a "STM32 unlock" utility as part of the standard J-Link SW pack. The tool can be started in Windows using the "start" menue and resets all values to factory default: | Segger provides a "STM32 unlock" utility as part of the standard J-Link SW pack. The tool can be started in Windows using the "start" menue and resets all values to factory default: |
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[{{:en:uhsdr_dev:segger_stm32_unlock.png?400|Segger J-Link STM32 unlock utility}}] | [{{:en:uhsdr_dev:segger_stm32_unlock.png?400|Segger J-Link STM32 unlock utility}}] |
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**Note:** The unlock utility resets the brown out reset (BOR) to "level 0", equalling about 1.7 Volt. | **Note:** The unlock utility resets the brown out reset (BOR) to "level 0", equalling about 1.7 Volt. |
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Further reading: | Further reading: |
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* Check Option Byte support on J-Link, see [[https://wiki.segger.com/Setting_read_out_protection_on_STM32F0_devices|here]] and [[http://forum.segger.com/index.php?page=Thread&threadID=1486|here]] for a starting point. | * Check Option Byte support on J-Link, see [[https://wiki.segger.com/Setting_read_out_protection_on_STM32F0_devices|here]] and [[http://forum.segger.com/index.php?page=Thread&threadID=1486|here]] for a starting point. |
* See [[https://wiki.segger.com/STM32|here]] and [[https://wiki.segger.com/MCU_Security_Options|here]] | * See [[https://wiki.segger.com/STM32|here]] and [[https://wiki.segger.com/MCU_Security_Options|here]] |
* See 3.12.2 J-Link STM32 Unlock (Command line tool) in {{ :en:uhsdr_dev:um08001_jlink.pdf |J-Link User Guide}} | * See 3.12.2 J-Link STM32 Unlock (Command line tool) in {{:en:uhsdr_dev:um08001_jlink.pdf|J-Link User Guide}} |
* J-Link adapter seems to support option byte programming via J-link utility and/or J-Flash utility. This is indicated in previous versions of the J-Link or J-Flash user guides, but not in the current ones. See for example section 7.5.1.2 [[http://www.farnell.com/datasheets/1512229.pdf|here]] | * J-Link adapter seems to support option byte programming via J-link utility and/or J-Flash utility. This is indicated in previous versions of the J-Link or J-Flash user guides, but not in the current ones. See for example section 7.5.1.2 [[http://www.farnell.com/datasheets/1512229.pdf|here]] |
* ToDo: Verify and try out | * ToDo: Verify and try out |
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| ==== Flashing MCU with Segger J-Link ==== |
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| As part of the Segger J-Link SW pack the flash utility "J-Link lite" is provided. Start J-Flash using Windows "start" button. **Note:** J-Flash does not support .dfu files. Use the UHSDR .bin files. Load bootloader at address 0x08000000 and load firmware at 0x08010000. |
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| [{{:en:uhsdr_dev:j-flash.png?400|Segger J-Flash Lite tool}}] |
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| ==== Get to know J-Link: Converting on-board ST-Link On-Board into J-Link On-Board ==== |
| * Certain STM32 development boards contain an ST-Link probe. |
| * For experiments with J-Link (not related to OVI40, but in order to get to know J-Link HW & SW) the on-board ST-Link board of those boars can be converted to J-Link, see [[https://www.segger.com/products/debug-probes/j-link/models/other-j-links/st-link-on-board/|here]]. |
| * Compatible STM32 that can be re-flashed are listed [[https://www.segger.com/products/debug-probes/j-link/models/other-j-links/st-link-on-board/|here]]. |
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==== ToDo ==== | ==== ToDo ==== |
* Checkout [[https://wiki.segger.com/STM32|Segger STM32 support Wiki]] in general | |
| * https://www.segger.com/products/debug-probes/j-link/models/other-j-links/st-link-on-board/Checkout [[https://wiki.segger.com/STM32|Segger STM32 support Wiki]] in general |
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==== Further Reading ==== | ==== Further Reading ==== |
* {{ :en:uhsdr_dev:um08001_jlink.pdf |J-Link User Guide}} | |
* {{ :en:uhsdr_dev:um08003_jflash.pdf |J-Flash User Guide}} | |
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| * {{:en:uhsdr_dev:um08001_jlink.pdf|J-Link User Guide}} |
| * {{:en:uhsdr_dev:um08003_jflash.pdf|J-Flash User Guide}} |
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