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--- en:uhsdr_dev:segger_j_link [23.02.2018 05:50] – df9ts_user
+++ en:uhsdr_dev:segger_j_link [27.02.2018 08:46] (current) – df9ts_user
@@ Line 1: / Line 1: @@
-Segger Tools require a Segger probe to be used. For non-commercial use Segger offers the low priced "J-Link Edu" probe
+==== Segger J-Link Introduction ====
+Segger provides a probe - J-Link - that can be used for programming and debugging. For non-commercial use Segger offers the low priced [[https://www.segger.com/products/debug-probes/j-link/models/j-link-edu/|J-Link Edu]] probe.
 Segger supports the Cortex M7 SWV interface used on OVI40 UI and offers plug-ins for MCU eclipse.
-For Debug output Segger offers two options in MCU eclipse:
+For Debug output Segger offers an two options in MCU eclipse:
   * TRACESWO output as defined by CORTEX M7. This requires a dedicated pin, currently used for M3 pushbutton switch
-  * Segger Real Time Tracing (RTT) with outputs debug messages in high speed via SWV debug lines (CLK and SWData). No need for an additional line to printout debug messages
+  * [[https://www.segger.com/products/debug-probes/j-link/technology/real-time-transfer/about-real-time-transfer/|Segger Real Time Tracing (RTT)]] with outputs debug messages in high speed via SWV debug lines (CLK and SWData). No need for an additional line to printout debug messages (as is the case with TRACESWO).
+The J-Link makes use of the Cortex-M feature, which allows accessing the memory via the debug interface while the target is running.
+How this works in general is described [[https://www.segger.com/jlink-rtt.html|here]].
 The speed advantage of RTT - according to Segger data - is impressive:
@@ Line 12: / Line 17: @@
 [{{:en:uhsdr_dev:rtt_speedcomparison.png?400|RTT speed comparison, from Segger web site [[https://www.segger.com/products/debug-probes/j-link/technology/real-time-transfer/about-real-time-transfer/|here]]}}]
-==== Install J-Link Debian SW ====
+==== Install J-Link Software ====
+=== Debian SW Install ===
   * Download .deb J-Link packages from [[http://www.segger.com/download_jlink.html|http://www.segger.com/download_jlink.html]]
@@ Line 21: / Line 28: @@
 </code>
-==== Install J-Link in GNU MCU Eclipse ====
+=== Windows SW Install ===
+ToDo
+==== Segger J-Link adapter Firmware update ====
+As part of the Segger J-Link SW pack the "J-Link Configurator" utility. In Windows it can be started using the Windows start menu
+[{{:en:uhsdr_dev:segger_config.png?400|Segger J-Link Configurator - Firmware update tool}}]
+==== Install & Configure J-Link in GNU MCU Eclipse ====
 See [[https://gnu-mcu-eclipse.github.io/debug/jlink/|here]]
-==== Install Packs ====
+=== Install Packs ===
 For installing CMSIS packs see [[https://gnu-mcu-eclipse.github.io/plugins/packs-manager/|here]]
@@ Line 32: / Line 49: @@
   * Download CMSIS packs from Keil, see
   * Install local cop of STM32F7 and STM32H7
+=== J-Link and Eclipse ===
+  * Describe Eclipse seetings (MCU, CMSIS, probe settings, …) to use J-link probe on Eclipse with uHSDR
+==== Segger Real Time Terminal RTT ====
+  * See [[https://wiki.segger.com/RTT|here]]
+  * See {{:en:uhsdr_dev:an08005_usingrttoncortexar.pdf|AN08005}}  (although this is for Cortex-A / Cortex-R and not the Cortex-M used by OVI40 it still gives some insights)
+  * [[https://os.mbed.com/teams/anyThing-Connected/code/SEGGER_RTT/|Try RTT on UHSDR]]
+ - is it really 100 times faster than SWO print and 10.000 times fasster than semi-hosting? Segger says [[https://wiki.segger.com/RTT|here]] that Cortex-M supports background memory access and that RTT will have no impact on Cortex-M execution speed
+== RTT target code ==
+The RTT target code is shipped as part of the J-Link Software and Documentation Pack which can be downloaded [[https://www.segger.com/products/debug-probes/j-link/technology/real-time-transfer/about-real-time-transfer/|here]]. The RTT sources can be found in the J-Link software package under: Samples/RTT
+=== Calling SEGGER_RTT print from within interrupts / make it re-entrant ===
+During RTT output the functions SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() are called by default in RTT, but the function bodies of those functions are empty and need to be implemented according to MCU used and use case.
+Please implement
+  * SEGGER_RTT_LOCK()
+  * SEGGER_RTT_UNLOCK()
+  * .. and disable interrupts and threads which might use RTT in SEGGER_RTT_LOCK() and enable them again in SEGGER_RTT_UNLOCK().
+  * See [https://mcuoneclipse.com/2014/01/26/entercritical-and-exitcritical-why-things-are-failing-badly/|here]] for a discussion on how to enable / disable interrupts on Cortex-M
+==== J-Link support for Option bytes and Lock / Unlock ====
+Segger provides a "STM32 unlock" utility as part of the standard J-Link SW pack. The tool can be started in Windows using the "start" menue and resets all values to factory default:
+[{{:en:uhsdr_dev:segger_stm32_unlock.png?400|Segger J-Link STM32 unlock utility}}]
+**Note:**  The unlock utility resets the brown out reset (BOR) to "level 0", equalling about 1.7 Volt.
+Further reading:
+  * Check Option Byte support on J-Link, see [[https://wiki.segger.com/Setting_read_out_protection_on_STM32F0_devices|here]] and [[http://forum.segger.com/index.php?page=Thread&threadID=1486|here]] for a starting point.
+  * See [[https://wiki.segger.com/STM32|here]] and [[https://wiki.segger.com/MCU_Security_Options|here]]
+  * See 3.12.2 J-Link STM32 Unlock (Command line tool) in {{:en:uhsdr_dev:um08001_jlink.pdf|J-Link User Guide}}
+   * J-Link adapter seems to support option byte programming via J-link utility and/or J-Flash utility. This is indicated in previous versions of the J-Link or J-Flash user guides, but not in the current ones. See for example section 7.5.1.2  [[http://www.farnell.com/datasheets/1512229.pdf|here]]
+      * ToDo: Verify and try out
+==== Flashing MCU with Segger J-Link ====
+As part of the Segger J-Link SW pack the flash utility "J-Link lite" is provided. Start J-Flash using Windows "start" button. **Note:**  J-Flash does not support .dfu files. Use the UHSDR .bin files. Load bootloader at address 0x08000000 and load firmware at 0x08010000.
+[{{:en:uhsdr_dev:j-flash.png?400|Segger J-Flash Lite tool}}]
+==== Get to know J-Link: Converting on-board ST-Link On-Board into J-Link On-Board ====
+  * Certain STM32 development boards contain an ST-Link probe.
+  * For experiments with J-Link (not related to OVI40, but in order to get to know J-Link HW & SW) the on-board ST-Link board of those boars can be converted to J-Link, see [[https://www.segger.com/products/debug-probes/j-link/models/other-j-links/st-link-on-board/|here]].
+  * Compatible STM32 that can be re-flashed are listed [[https://www.segger.com/products/debug-probes/j-link/models/other-j-links/st-link-on-board/|here]].
+==== ToDo ====
+  * https://www.segger.com/products/debug-probes/j-link/models/other-j-links/st-link-on-board/Checkout [[https://wiki.segger.com/STM32|Segger STM32 support Wiki]] in general
+==== Further Reading ====
+  * {{:en:uhsdr_dev:um08001_jlink.pdf|J-Link User Guide}}
+   * {{:en:uhsdr_dev:um08003_jflash.pdf|J-Flash User Guide}}