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dl7pf
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Re:Antennenrelais bei CW zu träge??
« Reply #15 on: 26. January 2018, 16:20:29 »

Liebe OMs,

das ist ja schon eine sehr ausführliche Diskussion geworden. Danke für die vielen ausführlichen Kommentare. Ich sehe nun, dass es nicht nur bei meinem Gerät das Problem gibt.

Da ich, wenn ich CW mache, sehr langsam unterwegs bin, also z.B. bei 16 wpm, stelle ich Delay mindestens auf 50 oder mehr, damit das Relais nicht zwischen den Zeichen schon wieder abfällt . Aber auch beim Delay 0 schafft es kein E auch nur teilweise an die Antenne, was ja nach den dargestellten Berechnungen eigentlich der Fall sein sollte. An meiner Hardware sollte es nicht liegen. Was kann man da falsch machen?

Zzt. habe ich FW D2.6.0 installiert. Vielleicht gibt es ja in künftigen Updates doch mal eine Lösung.

73
Wolf
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Re:Antennenrelais bei CW zu träge??
« Reply #16 on: 26. January 2018, 16:27:14 »

Ok Andreas.

Just to clarify: I am saying that during CW QSO waterfall / spectrum is not needed. During CW QSO I listen (or may read CW decoder), but can do without  waterfall / spectrum

The statement in Github issue 1011 was that switching off spectrum / waterfall will improve the situation. So I propose to have spectrum / waterfall in CW receive (of course!) but when sending CW to have it stopped automatically for the time I am sending CW.
When paddle is released (plus delay) waterfall/spektrum start again, automatically.

Gruß

Gerd.
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DD4WH
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Re:Antennenrelais bei CW zu träge??
« Reply #17 on: 26. January 2018, 16:37:50 »


I guess to really solve the problem, we need a completely new audio handling for CW in the UHSDR. This includes not only fast TX signal shaping/filtering, but also codec switching etc.

Any volunteers? ;-)

Frank DD4WH
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DF8OE
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Re:Antennenrelais bei CW zu träge??
« Reply #18 on: 26. January 2018, 16:40:25 »

Gerd,

Danilo GUESSES and wants testing *if switching off waterfall and/or spectrum helps*. But until now nobody has confirmed that.

Switching off wf/scope during TX does not help. You must switch it off at RX!!! Data traffic to LCD must be eliminated (and I am not sure, that will change anything). The problem is the time we need from any time slot in RX to go to TX. Nobody knows what firmware is executing when you press the key or activate the paddle. That can be at the beginning of an audio interrupt, at the beginning of a LCD transfer and so on.

Please test and report if switching off will change anything - reports are highly welcome!

I think the biggest problem is the audio interrupt itself. Just a guess. And that would be very bad.

EDIT:
I think nobody knows audio processing scheme better than Frank. And he has the same feeling as me. It will be possible - but the price is a very high one.

vy 73
Andreas
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Re:Antennenrelais bei CW zu träge??
« Reply #19 on: 26. January 2018, 16:55:25 »

Hi,

without too much details: If we want to have less delay in RX to TX and a more deterministic delay, a serious rewrite of very critical portions of the software is required. It needs a lot of thought to be done otherwise we will run in high instability  (read crash) risk. Trust me on this.

Some more on this:
Moving the RX/TX switching into an interrupt is of course possible but needs to be synchronized with a lot of other activities since everywhere in the code (display, button handling, audio processing) we assume that we don't switch rx/tx mode when we run a function. Switching RX/TX inside an interrupt would break this assumption and we would have to first identify and then rewrite the code which does have a problem with that. And identify means essentially to look into ALL source code we have.

73
Danilo 
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perfect CW hardware for high speeds (> 20WPM)
« Reply #20 on: 26. January 2018, 16:58:27 »

My idea for OVI40-II:

Adding new hardware. We do need a sine wave generator which produces 0/90/180/270° sine wave which is switched directly (!!) to the IQ Modulator. Of course LO must be adjusted according to choosen RX frequency before. But transferring a new frequency to LO should be fast (I do not know the time PLL needs to snap but I think it will be some us). We will need a second MCU to do CW stuff "keyers". That part of code is very simple and will fit to STM32F100. Because this MCU in RX will do nothing else than waiting for a CW TX command (straight key or keyer) there will be no impacting delay.

If we go this way, we do not need to stop tasks of main MCU unclean, we can leave both codecs in the state they are and tone generation of  sine ave for CW can run continuosly.

And, believe me:

I think adding such hardware and changing layout of UI PCB is an quite easy task than rewriting complete firmware.


Edit:
Hmmmmmm.... I see that connectors for CW are located on RF PCB.... So it would be a great idea to add a header where we can cut the old keyer routes to UI PCB and possibly fit a PCB whith such special CW hardware at a later state of RF PCB design. As I already told it is modularized. I know what kind of signals we will need / must cut, give it some of the (thank god) free GPIOs to it and later users who want to use OVI40 intensively for CW can add this module...

vy 73
Andreas
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Re:Antennenrelais bei CW zu träge??
« Reply #21 on: 26. January 2018, 17:10:52 »

Hi Andreas,

that additional hardware would not at all solve the problem I described. Throwing more hardware to fix a software design issue is in general not a good idea and also not in this particular case. That is "rumfuschen".

We should rather fix the software. And before we go to rewrite the whole thing, we should figure out what is going on. That the keyer sends out a too short first dot is something we can look at and fix most likely relatively easy. We can't fix the somewhat indeterministic delay though, we can only try to reduce the delay (unless we do the full software makeover as discussed above).

73
Danilo
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Re:Antennenrelais bei CW zu träge??
« Reply #22 on: 26. January 2018, 17:19:52 »

Hi Danilo,

if the work you have to do for fixing the problem is very intensive and will take long time (and maybe will not work at all using the given hardware) it is always a serious way to add hardware which solves the problem.

My idea was only a very early "pre-alpha-stage-idea". But if we can cut all lines which are needed for CW TXing by hardware switches, generate the necessary signals using a second MCU and leaving the rest untouched that will do the job and if something does the job it is no "rumpfuschen" in my eyes.

I do have concrete schematics in my head which lines are needed - it is just a handful.

And I by myself never would need that - because I am not working in CW faster than 20WPM and use a keyer for that speed. Using straight key I am able to TX with 15...17WPM - that speed works flawlessly with mcHF/OVI40/UHSDR. This is just a tribute to the CW enthusiasts - and there are reasonable groups of persons who would like that.

vy 73
Andreas
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Re:Antennenrelais bei CW zu träge??
« Reply #23 on: 26. January 2018, 17:45:09 »

Andreas,

sounds great. If you think about CW & Rf board please consider that - depending on PA design and filtering - for CW the PA may not have to be to be linear. If PA non-linear biased for CW it may consume less DC power. Remember Frank's "power efficiency" discussion from yesterday. Again this is just a thought, no feature request.

Danillo,

proposal was:

- make audio sidetone generator deterministic (whenever CW contact closed the sidetone is generated in "realtime")
- CW Contact closure / open is written into buffer with time stamps, estimate resolution of timestamp should be 5 ms (guessing here)
- This buffer is used since as the experts explain UHSDR switches from RX to TX in a non-determenistic way, certain ISR need finishing.

In short: sidtone audio output deterministic, actually sending lags behind, delay non-determenistic. From previous discussion I understand delay 30..50 ms - this is no problem.

Dependency: Since CW is sent from buffer the UHSDR needs to empty CW TX buffer before switching to RX (assumed 50 ms) and another non-determenistic delay to switch from TX to RX needs to be waited for (another 30..50 ms worst case). Total less than 100 ms, not a problem

BR

Gerd.
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Re:Antennenrelais bei CW zu träge??
« Reply #24 on: 26. January 2018, 18:06:54 »

Hi Gerd,

of course I know PA must not be linear in CW. But the PA design I use consists of a double LDMOS circuit. These circuits have very high dependency between BIAS and amplification. So I must add a new stage (I call it "CW C operation) where BIAS is constantly on but very low. No problem because of BIAS is measured actively and can be readout via software. I use 20A hall element I2C current sensors on each LDMOS and BIAS can be set to every mA count you can imagine. I also will use this current measuremment for security circuit of PA if there is antenna misalignment or other damage.

I already do have a complete ("basement") additional hardware in my thoughts. Very good that I always develp electronics "in my brain" - no schematics drawn. So it is easy to add before alpha stage. Do not misunderstand: I only will add the neccessary headers to RF board. There will be some tracks that must be cut later if you want to use "CW addon board". Actually I only must add some tracks, some headers and some 0R resistors.

Shaping of edges of CW signal can be made via software ("anti-click").

vy 73
Andreas
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Re:Antennenrelais bei CW zu träge??
« Reply #25 on: 29. January 2018, 14:48:36 »

Ich habe heute mit einem befreundetem OM auf 10 Mhz CW mit 30 WPM getestet.
Er hat mir auf Nachfrage die Aussendung als in Ordnung, ohne fehlende Zeichen/ "Zeichenanteile" am Anfang der Aussendung, bestätigt.

OVI40 v1.07
Sendeumschaltung mit Relais
TX/RX Delay 10msec
Power 10 Watt
FW D2.7.66

Da ich CW sonst nur mit max. 22/23 WPM mache, habe ich auf Grund der Diskussion, dieses mal mit meiner Hardware getestet.

73
Dietrich
« Last Edit: 29. January 2018, 14:50:45 by DL3AAA » Logged

73 Dietrich
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Diskussions- und Newsboard des DARC-Ortsverbandes I40  |  allgemeine Kategorie  |  mcHF Projekt Deutsch / English (here you can discuss everything related to mcHF) (Moderators: DF8OE, DL1PQ)  |  Topic: Antennenrelais bei CW zu träge?? <- zurück vorwärts ->
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