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Topic: The DDC board (Read 2602 times)
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SP9BSL
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positron
alter Hase
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Posts: 443
 
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The DDC board
« on: 30. June 2020, 09:32:40 »
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Hi,
the DDC board is the main RF interface of my project. The main task of this board is to convert the RF analog signal to digital equivalent and transmit it via I2S/SAI port to F7/H7 core and provide clocking for all the data processing chain. At the HF input of the receiver i placed the variable attenuator (0..31.5dB) and antialiasing filter for lower bands up to 6m. This is conventional part of DDC receiver working in first Nyquist zone with frequencies below half of the sampling rate. The second input is provided for 4m and 2m support based on 2nd and 3rd Nyquist zone, so called 2nd and 3rd aliases. To make it works a set of band pass filters is needed - also on the board. At the input I've placed the LNA (PGA103+) for higher than 6m bands which is not good solution for lower bands because of large impedance mismatch. The transmitter path uses exactly the same type and count of the filters - just second set because this board is full duplex.
Beside this RF circuit board has low phase noise clock with additional precise frequency TCXo to form a kind of frequency locked loop (long term), done digitally in FPGA. All the I/O transactions go by SPI interface directly to the F7/H7 core in UI. The board was designed as 4 layer board to keep the impedances and shield where it is necessary. The dimensions: 91x60mm. Almost all board component size is 0603 with some 1206.
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73 Slawek
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SP9BSL
Moderator
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alter Hase
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Posts: 443
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Re:The DDC board
« Reply #1 on: 30. June 2020, 09:33:22 »
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Some measurements of the input:
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73 Slawek
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SP9BSL
Moderator
positron
alter Hase
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Posts: 443
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Re:The DDC board
« Reply #2 on: 01. July 2020, 11:58:03 »
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Corrected wrong file of the output signal:
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73 Slawek
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Single_tone_measurements.pdf
